Downsampling for saving CPU

[Rocko]

HI,

I'm experimenting with a 4 band compressor and limiter.

For the lower band, only low frequencies are there for processing (naturally), say lower than 500Hz.
In this case, I'm interested in downsampling this band.
No need for information at the speed of 48KHz for signals lower than 500Hz.

How can I do that? Using hop will just 'throw away' some of the samples, but calculation will still be at 48 KHz.
Is there a smart way to 'downsample' a whole block (compressor + Limiter) for low frequency processing?

[Spogg]

Interesting question!

My understanding is that say Hop(16) will mean the code is only evaluated every 16 samples. This would mean not losing samples but needing to alter the control values like frequency to get a similar result.
The standard envelope generators, which are in effect very low frequency you could say, run at hop(16) so the required numer of sample steps has to be scaled to get the desired times.
Quite what would happen with filters I don't know, but it would make an interesting experiment!

Cheers

Spogg

[Rocko]

Hey Spogg,

Interesting and thanks for the answer. I'll soon test it (a day or two) and update. Until then, please do read on I have more interesting questions...

I hope this example makes sense:
Let's assume the 'sample rate' is 16 Hz (16 samples per second, just an example). Each sample has 1/16 [second] till next one arrives.
Let's also assume each sample has 100 CPU operations to undergo till next sample arrives (just an example).
So, sixteen samples would 'cost' 1600 operations a second. Each 100 operations happen in a time window of 1/16 [sec].
With 'hop(16)' one would get 100 operations for the same sixteen samples. Nice !
However for the first sample of this lot the CPU will still hit a peak of 100 operations in a window of 1/16 [sec].

What if my CPU can run maximum 50 operations over a period of 1/16 [sec] ?
In this case I would like to spread the 100 operations over the 16 sample span (one second).
Ideally I would like to 'unite' all 16 samples to a single long one which has 1 second for the operations.
Is there any technique to 'spread' the 100 needed operations over the 16 sample time length ?

[Spogg]

Hey I had to read that 3 times!

AFAIK for Hop(16) every 16th sample step is intense and the whole code is run. Then it's ignored for the remaining 15 sample steps. What you want is for the evaluation to be done in little steps, evaluating 1/16th of the code for each "visit". I think.
But how would you divide up the action into 16 baby steps? I don't think this is possible.
Extending this further, if you have loads of envelopes all going off at once the very first step would be huge in terms of CPU, then very quiet for a bit. This is unless the code manages to distribute the Hops to start at different times. If it did that you may well end up with phase and timing issues.

This is all speculation based on the understanding of an ageing Vulcan so don't take this as gospel

Cheers

Spogg

[Rocko]

AFAIK for Hop(16) every 16th sample step is intense and the whole code is run. Then it's ignored for the remaining 15 sample steps. What you want is for the evaluation to be done in little steps, evaluating 1/16th of the code for each "visit". I think.

Yes, I agree. Our understanding is mutual.
You shed some light on my original post and made it more understandable, thanks Spogg !

I'm trying to point out the difference between 'hop' and 'real down sampling'.
Hop - will give you a 'burst' of CPU burden followed by a 'quiet period' this is good for 'normal clock speed PC' scenario. (one which can carry out the burst).
Down sample will simply refer to the 16 samples as one (losing some information) and run the calculations at lower pace (longer window). This is better for a 'slow clock PC' scenario. (one which can not carry out the burst).

So let me please rephrase my original question to:
Is there a way to utilize the fact that the information is limited to 500 Hz, to run calculations at low speed (not hop) ?

[Spogg]

I don't know of a way, so if there is hopefully someone else can chip in here.

Cheers

Spogg

[tulamide]

I would be glad if the dsp gurus would correct me, but from my understanding you wouldn't gain any advantage from downsampling. If frequencies were bit coded, that would make it an easy and helpful task. But they aren't, they are a bunch of floating point numbers. So in order to only omit the unwanted frequencies you'd need the help of fft, which means converting from time to frequency domain, downsampling and converting back to time domain. That would be more cpu load, not less.

Besides, even on Android phones we're talking of at least a million cpu cycles per second. Even if each instruction would cost 10 cycles on average, the savings would be marginal.

[Iainmf]

Another thing to consider is that if you can 'downsample' you will also have to 'upsample'.

If you do use 'hop' to process every 16 samples, then potentially you will end up with an output that has steps. If you are trying to do a smooth gain change you don't want sudden jumps every 16 samples. You'd need to have a filter to smooth the out the steps.

[Spogg]

If you do use 'hop' to process every 16 samples, then potentially you will end up with an output that has steps. If you are trying to do a smooth gain change you don't want sudden jumps every 16 samples. You'd need to have a filter to smooth the out the steps.

Or maybe some kind of interpolation to smooth the steps a bit. Then you probably will lose any CPU advantage!

Plus, what about aliasing?

So, hop doesn't seem to be the way forward

Cheers

Spogg

[Rocko]

Hi,

Thank you for all the answers. I agree with all of the above.

However, it still seems weird to me that there is so much 'information waste' when processing low frequencies.
I mean frequencies which are lower than 500 Hz are sampled at 44.1/48KHz ...
In some kind of an ideal world the sample rate would be dynamically adapted to the sampled material...

Nowadays this is not a problem, but I guess in the old days stuff like this used to be a problem especially for silicon IC (DSP) and slow PC's...

So, I guess my question is becoming too theoretical and not necessarily 'flowStone / PC' related.

Thanks for all of the answers, and if someone is still familiar with generic techniques for lowering CPU on low frequency content - please share. It might be interesting...